FIELD OF THE INVENTION
This invention relates to an automatic sweep digital tuning circuit which may be used in television sets, and AM or FM radio receivers.
In one type of electronic tuner which has been extensively used in television sets and AM or FM radio receivers, a variable capacitance diode is employed as the capacitance of the tuning circuit and a tuning voltage is applied to the variable capacitance diode to produce resonance at a desired frequency. It should be noted that an electronic tuner which searches a desired broadcast station by automatically sweeping a tuning frequency (hereinafter referred to as "a search function") has been proposed. The tuning frequency is swept in accordance with a voltage synthesizer system in which the tuning voltage applied to the variable capacitance diode is processed as digital data.
The search function will be described below with reference to a conventional automatic sweep digital tuning circuit illustrated in FIG. 1. In FIG. 1, a switching circuit 1 applies a switching signal to an automatic sweep control circuit 2. The automatic sweep control circuit 2 provides a pulse to an up-down counter 3 in dependence upon the switching signal, thereby causing the up-down counter 3 to increase its count value. The up-down counter 3 supplies a digital output to a digital-to-analog (D/A) converter 4 which converts the digital output to an analog output comprising a DC voltage. The analog output is applied to an electronic tuner 5 as a tuning voltage for the variable capacitance diode. As the count value of the up-down counter 3 is increased, the tuning frequency of the electronic tuner 5 is swept from a low frequency to a high frequency. An automatic frequency fine control (AFC) circuit 6 provides fine control for tuning in the desired frequency.
When the tuning frequency is swept and approaches the frequency of a desired broadcast radio wave, the automatic sweep control circuit stops sending pulses to the up-down counter 3 and the sweep is suspended. FIG. 2 is a circuit diagram illustrating one example of a comparison circuit, incorporated in the automatic frequency fine control circuit 6 for determining when the sweep should be suspended. FIG. 3 illustrates waveform diagrams for illustrating the operation of the comparison circuit of FIG. 2.
Referring to FIG. 2, the comparison circuit comprises a pair of voltage comparators 11 and 12. An AFC voltage which varies as an S-shaped curve around a desired tuning point is applied to a terminal 13 by the electronic tuner 5 and reference voltages are applied to the voltage comparators 11 and 12 via input terminals 14 and 15, respectively. The outputs of the comparison circuits 11 and 12 are provided at terminals 16 and 17, respectively.
Referring to FIG. 3(a), reference voltages V.sub.1 and V.sub.2 are applied to the input terminals 14 and 15, respectively, and the AFC voltage (the solid line) is applied to the terminal 13. The reference voltages V.sub.1 and V.sub.2 are selected so as to meet the following expression: EQU V.sub.1 &gt;V.sub.0 &gt;V.sub.2
where V.sub.0 is the reference voltage of the AFC voltage. As can be seen from FIG. 3(b), the output of the voltage comparator 11 is at a low logic level (L) when the AFC voltage is lower than the reference voltage V.sub.1 and is at a high logic level (H) when the AFC voltage is higher than the reference voltage V.sub.1. In contrast, as seen in FIG. 3(c), the output of the voltage comparator 12 is at a low logic level (L) when the AFC voltage is higher than the reference voltage V.sub.2 and is at a high logic level (H) when the AFC voltage is lower than the reference voltage V.sub.2. Accordingly, referring to the S-shaped curve for the AFC voltage which is illustrated in FIG. 3(a), the output levels at the output terminals 16 and 17 are as indicated in FIGS. 3(b) and 3(c), respectively.
When the tuning frequency, which is being swept from a low frequency to a high frequency, approaches the frequency of the S-shaped curve of the AFC voltage, the output at the output terminal 16 is first raised to a high level (H) at the point A, and is then set to the low level (L) at the point B. The output at the output terminal 17 is raised to a high level (H) at the point D and if this high level at terminal 17 is detected to stop the sweep, then the tuning frequency at the time the sweep is stopped, is near point D on the S-shaped curve of the AFC voltage. The automatic frequency fine control circuit 6 is then operated to bring the tuning frequency to the optimum tuning point C.
An example of the remainder of the automatic frequency fine control circuit 6 and its connection to the up-down counter 3 is illustrated in FIG. 4. The automatic frequency fine control circuit 6 includes AND gates 18 and 19 and a pulse generating circuit 20. When the output at the output terminal 16 of the voltage comparator 11 is at the high level (H), the AND gate 18 is opened to apply the output pulses of the pulse generating circuit 20 to the up-down counter 3 so that the count value of the up-down counter 3 is increased. When the output at the output terminal 17 of the voltage comparator 12 is at the high level (H), the AND gate 19 is opened to apply the output pulses of the pulse generating circuit 20 to the up-down counter 3 so that the count value of the up-down counter 3 is decreased. Therefore, if the tuning frequency is between the frequencies represented by points A and E in FIG. 3(a), the automatic frequency fine control circuit 6 is capable of moving the tuning frequency to the optimum tuning point C.
One problem with the automatic sweep digital tuning circuit of FIG. 1 is that when the digital data of the up-down counter 3 is converted into an analog signal by the D/A converter 4, a time delay occurs. In addition, the response of the AFC voltage to the tuning frequency is delayed. Therefore, when the tuning frequency is swept from a low frequency to a high frequency and is stopped near the frequency of the broadcast radio wave (e.g., at the point D in FIG. 3(a)) as described above, the digital output of the up-down counter 3 is higher than a value corresponding to the analog output of the D/A converter 4 because of the above-mentioned time delay. Accordingly, if the automatic frequency fine control circuit 6 is operated under this condition, the DC voltage output of the D/A converter is initially shifted to a higher frequency. In general, for the S-shaped curve of the AFC voltage, the range of frequencies between points A and B is large, but the range of frequencies between points D and E is small. Thus, when the automatic frequency fine control circuit 6 is operated after the frequency sweep has been stopped, the tuning frequency is shifted to a point higher than point E, thereby making it impossible to bring the tuning frequency to the optimum tuning point C. This difficulty may be overcome by decreasing the sweeping speed; however, this results in a disadvantage in that the time required for sweeping the full range of frequencies which may be received, is increased.